1. Field of the Invention
The present invention relates to a ceramic substrate whereon semiconductor devices, LSIs and component chips are mounted, and a method to manufacture thereof.
2. Description of the Related Art
A ceramic chip carrier substrate of the prior art has a plurality of external connection pads on each of the four side faces thereof. These external connection pads are formed to extend from the side face to the bottom of the substrate. Recently, ceramic substrates having bumps arranged in a grid configuration on the bottom face for external connection have been put into use. Such ceramic chip carriers can be mounted in high density on a printed circuit board.
Ceramic chip carriers are mounted on a printed circuit board (mother board) in such a procedure as described below. Solder paste is printed onto specified terminals provided on a printed circuit board. Ceramic chip carriers are arranged on the printed circuit board so that the external connection terminals provided on the bottom face of the ceramic chip carrier are placed on the terminals with the solder paste printed thereon. Then the solder is reflowed so that the external connection terminals provided on the bottom face of the ceramic chip carrier are soldered onto the specified terminals provided on the printed circuit board.
External connection bumps of the conventional ceramic chip carrier have been formed after the manufacture of the ceramic substrate. This procedure results in a problem of high manufacturing cost of the ceramic chip carrier. Also in the procedure of forming each of the plurality of external connection bumps one by one, there has been a problem of variations being caused in the height, size and configuration of the external connection bumps. Deviation in the height of the external connection bumps is likely to cause connection failure between bumps of smaller height and the printed circuit board.
Moreover, there has been no method available to form the external connection bumps having sufficient height. As a result, there has been a problem in that the substrate of the ceramic chip carrier and the printed circuit board are brought too close to each other, causing solder bridges in the solder reflowing process which result in short-circuiting between the electrodes. There also has been a problem of joints being broken due to thermal stress, when the ceramic chip carrier substrate and the printed circuit board whereon the ceramic chip carriers are mounted have different thermal expansion coefficients.
As a solution to the problem of solder bridge, the Japanese Laid-Open Patent Publication No. 61-188942 discloses a method of preventing the solder bridge by providing a blocking means made of an electrically insulating material around the soldered joints. However, this method results in a complicated structure and a problem of high manufacturing cost.